Biography
Limin Jiang received the B.E. degree and the Ph.D. degree from the School of Communication and Information Engineering, Shanghai University, in 2020 and 2026. His doctoral research focused on domain-specific architectures and wireless communication systems. His current interests include silicon lifecycle management.
Interests
- Design-for-X and Silicon Lifecycle Management
- Netlist-to-GDSII Physical Design
- VLSI/ULSI System Design
Publications
会议论文
2026
[Design, Automation & Test in Europe Conference (DATE 2026)]
"Late Breaking Results: A Power-Efficient RISC-V Baseband System-on-Chip for Multi-Standard Integrated Sensing and Communications"
,
in Design, Automation & Test in Europe Conference (DATE 2026),
2026
DOI
2025
[ACM LCTES]
"Zoozve: A Strip-Mining-Free RISC-V Vector Extension with Arbitrary Register
Grouping Compilation Support (WIP)"
,
in Proceedings of the 26th ACM SIGPLAN/SIGBED International Conference
on Languages, Compilers, and Tools for Embedded Systems,
2025
DOI
[ASP-DAC]
"A Hierarchical Dataflow-Driven Heterogeneous Architecture for Wireless Baseband Processing"
,
in Proceedings of the 30th Asia and South Pacific Design Automation Conference,
2025
DOI
2024
[IEEE ISCAS]
"Dynamically Configurable FIR Filters Based on Serial MACs and Systolic Arrays"
,
in 2024 IEEE International Symposium on Circuits and Systems (ISCAS),
2024
DOI
2023
[ACM TURC 2023]
"A Domain Specific Computing Architecture for Open 6G Baseband Signal Processing"
,
in Proceedings of the ACM Turing Award Celebration Conference - China
2023,
2023
DOI
[IEEE AICAS 2023]
"Live Demonstration: An Integrated Computing and Communication Platform for
Vehicle-Infrastructure Cooperative Autonomous Driving"
,
in 2023 IEEE 5th International Conference on Artificial Intelligence Circuits
and Systems (AICAS),
2023
DOI
[FCN 2023]
"Critical-Set-Aided Multi-Bit Successive Cancellation List Decoders for Polar Codes"
,
in 2023 International Conference on Future Communications and Networks
(FCN),
2023
DOI
[IEEE SPAWC 2023]
"An FPGA-based Low Latency Sensing and Communication Platform for Collaborative Autonomous Driving"
,
in 2023 IEEE 24th International Workshop on Signal Processing Advances
in Wireless Communications (SPAWC),
2023
DOI
2021
[IEEE ISCAS]
"A Semi-Folded Decoding Architecture for Flexible Codeword Length Configuration of Polar Codes"
,
in 2021 IEEE International Symposium on Circuits and Systems (ISCAS),
2021
DOI
期刊论文
2026
[IEEE TVLSI]
"Venusian: Rapid Wireless Baseband Validation via High-Level Programming and FPGA-Based RISC-V Accelerator Co-Design"
,
in IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
2026
DOI
2025
[IEEE Wireless Communications]
"Venus: A RISC-V Domain Specific Architecture Towards Integrated AI and Wireless
Baseband Processing for 6G Edge Intelligence"
,
in IEEE Wireless Communications,
2025
DOI
[IEEE TVLSI]
"Unlimited Vector Processing for Wireless Baseband Based on RISC-V Extension"
,
in IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
2025
arXiv
DOI
[IEEE IoT-J]
"Near-Sensor LiDAR and Visual Feature Extraction and Communication for Low-Latency Roadside Cooperative Perception"
,
in IEEE Internet of Things Journal,
2025
DOI
[IEEE TCAD]
"An Arbitrary Register Grouping Scheme for RISC-V Vector Extension: Compilation
Support and Hardware Implementation"
,
in IEEE Transactions on Computer-Aided Design of Integrated Circuits and
Systems,
2025
DOI
[IEEE ESL]
"A Hybrid Hardware-Software Scheduling Scheme for Heterogeneous Many-Core Systems"
,
in IEEE Embedded Systems Letters,
2025
DOI
2024
[IEEE TCAS-I]
"A Critical-Set-Based Multi-Bit Successive Cancellation List Decoder for Polar
Codes: Algorithm and Implementation"
,
in IEEE Transactions on Circuits and Systems I: Regular Papers,
2024
DOI
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