Biography
My graduate research focused on LDPC and polar code decoding algorithms and FPGA implementation.
Interests
- LDPC and Polar Code Decoding Algorithms and FPGA Implementation
Publications
Conference Papers
2021
[IEEE ISCAS]
"A Semi-Folded Decoding Architecture for Flexible Codeword Length Configuration of Polar Codes"
,
in 2021 IEEE International Symposium on Circuits and Systems (ISCAS),
2021
DOI
2019
[IEEE APCCAS]
"A Reconfigurable Decoder for Standard-Compatible LDPC Codes and Polar Codes"
,
in 2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS),
2019
DOI
2018
[IEEE APCCAS]
"A Unified Reconfigurable Datapath for 5G Compatible LDPC Decoding"
,
in 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS),
2018
DOI
Journal Articles
2021
[IEEE TVT]
"A Reconfigurable and Pipelined Architecture for Standard-Compatible LDPC and Polar Decoding"
,
in IEEE Transactions on Vehicular Technology,
2021
DOI
2020
[IEEE TCAS-II]
"An Unfolded Pipelined Polar Decoder with Hybrid Number Representations for Multi-User MIMO Systems"
,
in IEEE Transactions on Circuits and Systems II: Express Briefs,
2020
DOI
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