20 April 2026 · Conference paper · DATE 2026

This DATE 2026 Late Breaking Results paper studies a power-efficient RISC-V baseband system-on-chip for multi-standard integrated sensing and communications. It extends the laboratory’s research from programmable processing toward system-level integration.

Research schematic: A power-efficient baseband SoC for sensing and communications
Research schematic: A power-efficient baseband SoC for sensing and communications

Publication

Late Breaking Results: A Power-Efficient RISC-V Baseband System-on-Chip for Multi-Standard Integrated Sensing and Communications

Limin Jiang, Yi Shi, Yihao Shen, Yintao Liu, Siyi Xu, Qingyu Deng, Xiaoxiao Chen, Qianli Wang, Shan Cao, Zhiyuan Jiang, Sheng Zhou

2026 Design, Automation & Test in Europe Conference (DATE), pp. 1-3

This work contributes to research around Venus. For supported platform applications and measured results, see the ACE-Echo 1.0 validation scope.

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