December 2025 · Journal issue · IEEE TVLSI
Unlimited Vector Processing (UVP) addresses register-size and grouping constraints in conventional vector architectures. It combines non-power-of-two register grouping with hardware strip-mining, and studies symmetric and asymmetric vector operations for wireless baseband workloads.
Publication
Unlimited Vector Processing for Wireless Baseband Based on RISC-V Extension
Limin Jiang, Yi Shi, Yihao Shen, Shan Cao, Zhiyuan Jiang, Sheng Zhou
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 33(12), 3423-3436
This work contributes to research around Venus. For supported platform applications and measured results, see the ACE-Echo 1.0 validation scope.