June 2026 · Journal issue · IEEE TVLSI
Venusian studies wireless baseband validation through high-level programming and FPGA-based RISC-V accelerator co-design. It brings software development and hardware evaluation into a shared research workflow, connecting flexible algorithm development with a hardware testbed.
Publication
Venusian: Rapid Wireless Baseband Validation via High-Level Programming and FPGA-Based RISC-V Accelerator Co-Design
Limin Jiang, Yi Shi, Yihao Shen, Yintao Liu, Shan Cao, Zhiyuan Jiang, Sheng Zhou
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 34(6), 2010-2014
This work contributes to research around Venus. For supported platform applications and measured results, see the ACE-Echo 1.0 validation scope.