September 2026 · Journal issue · IEEE TCAD

Zoozve explores arbitrary register grouping to handle long vectors without repeated software strip-mining. The work brings together instruction-set design, LLVM compilation and a hardware prototype, addressing register allocation and vector data movement as parts of one system.

Research schematic: Zoozve: flexible vector registers, from compiler to hardware
Research schematic: Zoozve: flexible vector registers, from compiler to hardware

Publication

An Arbitrary Register Grouping Scheme for RISC-V Vector Extension: Compilation Support and Hardware Implementation

Limin Jiang, Siyi Xu, Yintao Liu, Yihao Shen, Yi Shi, Shan Cao, Zhiyuan Jiang

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 45(9), 4450-4463

This work contributes to research around Venus. For supported platform applications and measured results, see the ACE-Echo 1.0 validation scope.

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