Personal Profile

Biography

Shan Cao is an Associate Professor in the Department of Communication Engineering, School of Communication and Information Engineering, Shanghai University. She received the B.Eng. degree in Electronic Science and Technology from Tsinghua University in 2009 and the Ph.D. degree in Electronic Science and Technology from Tsinghua University in 2015.

From 2015 to 2017, she was a postdoctoral researcher at the School of Information and Electronics, Beijing Institute of Technology. Since 2017, she has been with Shanghai University, where she has served as Lecturer and Associate Professor. Her research focuses on digital integrated circuit design, domain-specific computing architectures, wireless communication baseband processing, and deep-learning accelerator chips.

EducationPh.D.
DegreeDoctorate
OfficeRoom 305, Building 12, East Campus, Shanghai University

Research

Research Interests

Digital VLSI and SoC Design

Digital large-scale integrated circuit design, system-on-chip design, and hardware systems for communication and intelligent computing.

Domain-Specific Processor Architectures

Architecture design and optimization for parallel computing, baseband processing, and specialized computing workloads.

Digital Wireless Communication Systems

Wireless communication systems, baseband processors, and efficient encoder and decoder implementations.

Deep-Learning Hardware Acceleration

Neural-network accelerator chips, model compression, lightweight network models, and hardware-software co-optimization.

Honors & Service

Honors and Academic Service

  • 2017

    Shanghai Overseas High-Level Talent Program

  • 2020

    Shanghai University Cai Guanshen Outstanding Young Teacher Award

  • IEEE

    IEEE Circuits and Systems Society COMCAS Technical Committee Member

  • ISCAS

    IEEE ISCAS Review Committee Member

  • Session

    ICTC 2022 Special Session Chair; IEEE SiPS 2019 Special Session Chair, etc.

Projects

Research Projects

  1. Communication chips for 6G low-altitude networksIndustry collaboration, 2024-2025, PI
  2. Digital beamforming and direction-finding algorithmsIndustry collaboration, 2024, PI
  3. DDC module development for high-performance ADC chipsIndustry collaboration, 2022-2023, PI
  4. C-V2X FPGA system module design for intelligent unmanned vehiclesIndustry collaboration, 2022-2023, participant
  5. Heterogeneous fusion mechanisms for channel decoding in next-generation wireless communicationsShanghai Natural Science Foundation General Program, 2021-2024, PI
  6. Deep-learning-based heterogeneous architecture for general-purpose channel decodingNational Natural Science Foundation of China Young Scientists Fund, 2020-2022, PI
  7. Highly deterministic information interaction for robots based on time-sensitive networkingOpen project of a national key laboratory, 2019-2020, PI
  8. Networks supporting future autonomous drivingNational Key R&D Program international cooperation project, 2019-2020, participant
  9. R15 5G terminal prototype developmentNational major project, 2018-2019, participant

Teaching

Teaching

Parallel and Distributed Computing

Fall 2022-2024

Testability Design and Fault-Tolerant Design for Complex Objects

Spring 2020-2024

Communication Electronic Circuits

Spring 2019-2024

Digital Circuits

Fall 2016-2017

Selected Publications

Selected Publications

[1] S. Cao, S. Chen, L. Jiang and Z. Jiang, “A Critical-Set-Based Multi-Bit Successive Cancellation List Decoder for Polar Codes: Algorithm and Implementation,” IEEE Transactions on Circuits and Systems I: Regular Papers, early access.

[2] Y. Li, S. Cao, B. Zhao, W. Zhang and Z. Jiang, “Hybrid-Grained Pruning and Hardware Acceleration for Convolutional Neural Networks,” IEEE ISCAS, 2024.

[3] B. Ruan, L. Jiang, S. Cao and Z. Jiang, “Dynamically Configurable FIR Filters Based on Serial MACs and Systolic Arrays,” IEEE ISCAS, 2024.

[4] F. Ye, F. Yuan, S. Cao, Z. Jiang and S. Zhou, “SPMD-Based Mixed-Radix FFT and Channel Estimation for Energy-Efficient O-RAN,” FCN, 2023.

[5] Y. Shen, F. Yuan, S. Cao, Z. Jiang and S. Zhou, “Parallel Computing for Energy-Efficient Baseband Processing in O-RAN,” GLOBECOM, 2023.

[6] M. Yang, S. Cao, W. Zhang, Y. Li and Z. Jiang, “Loop-Tiling Based Compiling Optimization for CNN Accelerators,” ASICON, 2023.

[7] W. Zhang et al., “An FPGA-based Low Latency Sensing and Communication Platform for Collaborative Autonomous Driving,” SPAWC, 2023.

[8] S. Cao, H. Hu, L. Jiang, etc., “A Domain Specific Computing Architecture for Open 6G Baseband Signal Processing,” ACM TURC, 2023.

[9] R. Jiang, Z. Fei, S. Cao, etc., “Deep learning-aided signal detection for two-stage index modulated universal filtered multi-carrier systems,” IEEE Transactions on Cognitive Communications and Networking, 2022.

[10] Q. Sun, S. Cao, and Z. Chen, “Filter Pruning via Automatic Pruning Rate Search,” ACCV, 2022.

Show more publications

[11] L. Hui, S. Cao, Z. Chen, S. Li and S. Xu, “Configurable CNN Accelerator in Speech Processing based on Vector Convolution,” AICAS, 2022.

[12] C. Zhang, H. Hu, S. Cao and Z. Jiang, “A Novel Blind Detection Method and FPGA Implementation for Energy-Efficient Sidelink Communications,” SiPS, 2021.

[13] A. Nahli, S. Cao, Z. Jia, R. Ma and S. Xu, “Dataset and Network Structure: Towards Frames Selection for Fast Video Deblurring,” IEEE Access, 2021.

[14] H. Wang, S. Cao and S. Xu, “A Real-Time Face Recognition System by Efficient Hardware-Software Co-Design on FPGA SoCs,” AICAS, 2021.

[15] S. Cao, L. Jiang, T. Lin, S. Zhang and S. Xu, “A Semi-Folded Decoding Architecture for Flexible Codeword Length Configuration of Polar Codes,” ISCAS, 2021.

[16] S. Cao, T. Lin, S. Zhang, S. Xu and C. Zhang, “A Reconfigurable and Pipelined Architecture for Standard-Compatible LDPC and Polar Decoding,” IEEE Transactions on Vehicular Technology, 2021.

[17] S. Cao, W. Deng, Z. Bao, C. Xue, S. Xu and S. Zhang, “SimuNN: A Pre-RTL Inference, Simulation and Evaluation Framework for Neural Networks,” IEEE JETCAS, 2020.

[18] S. Cao, H. Zheng, T. Lin, S. Zhang and S. Xu, “An Unfolded Pipelined Polar Decoder With Hybrid Number Representations for Multi-User MIMO Systems,” IEEE TCAS II, 2020.

[19] Z. Jiang, Z. Cao, S. Fu, F. Peng, S. Cao, etc., “Revealing much while saying less: Predictive wireless for status update,” IEEE INFOCOM, 2020.

[20] H. Wang, S. Cao, S. Xu, etc., “Hardware-software co-design for face recognition on FPGA SoCs,” IEEE ISCAS, 2020.

Contact

Contact

Emailcshan@shu.edu.cn

OfficeRoom 305, Building 12, East Campus, Shanghai University

AffiliationDepartment of Communication Engineering, School of Communication and Information Engineering, Shanghai University